Random access memories, usually called RAMS or direct access memories, are extensively used in virtually all digital computing equipment for the temporary storage of binary information which may be rapidly retrieved directly without first searching through a large volume of irrelevant data. There are several types of RAMs, the most popular being the bipolar memory because it is one of the fastest memories presently available. A bipolar RAM may be described as a matrix of a large quantity of individual transistor memory cells with vertical columns or cells interconnected by bit lines and horizontal rows of cells connected between top and bottom word lines which enable a row of memory cells by the application of a high select voltage to the top word line and which, via the bottom word line, provides a current path to a suitable current source or sink. Thus, any cell in the memory matrix may be identified as being at the junction of a particular bit line pair and a particular word line pair.
A selected cell is normally read by selecting and raising the voltage on the top word line and maintaining the voltage on the bit line pair at a constant level. The cell may be then read by sensing the presence or absence of current in one of the bit line pairs because of the on or off state of the memory cell transistor connected to that particular bit line.
Writing into a particular cell is accomplished by similarly raising the voltage on the top word line to which the selected cell is coupled and by lowering the voltage on one bit line to turn on the transistor connected to that bit line. Because a good fast random access memory must be rapidly switched, the particular top word line associated with a cell selected to be read or written into must be switched to its high state very rapidly and for a very short period of time while the sense amplifier coupled to the bit lines rapidly extracts the data from the selected cell at the junction of that bit line and word line. This very rapid switching between word lines presents serious problems which are solved by the circuitry of the present invention.
When a selected word line is suddenly deselected, the voltage on the top word line must be rapidly lowered to its low state. If the voltage is permitted to bleed off gradually, the memory cells associated with that line may accidentally be read or written into by the next read/write operation of an entirely different cell. That is, a selected cell with the high enabling voltage on its top word line may, when deselected, be in transition through a mid-state at the time a different word line is switched to its high selected state to read from or write into a different cell. In very many instances, a cell in its mid-state is erroneously read or written into. In order to avoid such errors, the memory should be operated at a slower rate to permit the deselected word line to recover to its low state.
This invention is for circuitry coupled between the word lines and current sources for very rapidly discharging all de-selected word lines to thereby shorten the time each cell passes through its mid-state transition to prevent an accidental reading or writing of a deselected cell and thereby permitting the memory to be operated at a faster rate.